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MSL Baking Process For Semiconductors

The MSL baking process at OX3 Corporation, (“MSL” stands for Moisture Sensitivity Level), is in accordance with IPC and JEDEC Standard "J-STD-033A," the joint industry standard for semiconductor handling, packing, shipping and the use of moisture/reflow-sensitive surface mount devices. Semiconductor devices, based on their sensitivity to moisture, are classified into eight categories numbered as: MSL-1, MSL-2, 2a, 3, 4, 5, 5a, and 6, with 6 being the most sensitive to moisture.

OX3 checks each incoming lot of semiconductors upon receipt for its moisture sensitivity level number and its package thickness.  With the aid of the Table below, we then determine the MSL baking process time required for those devices.  The parts are baked in calibrated ovens for the specified time and dry-packed immediately upon removal in order to minimize any exposure to moisture.

Package Body Thickness MSL Bake Time (hrs) @ 125C
up to 1.40mm 2a 8
3 16
4 21
5 24
5a 28
up to 2.00 mm 2a 23
3 43
4 48
5 48
5a 48
up to 4.50 mm 2a 48
3 48
4 48
5 48
5a 48
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Axial, BQFP, CBGA, CCGA, CERDIP, CERQUAD, Chip Resistors, Chip Capacitors, CLCC, Connectors, CPGA, CQFP, Crystal, CSOJ, DFN, DIP, DPak, DQFN, DSBGA, FBGA, FET, Flatpack, GDIP, Heatsink, HSSOP, KDIP, LDCC, LGA, LLCC, LSOJ, LTCC, MSOP, Oscillator, PBGA, PDIP, PFP, PGA, PKDIP, PLCC, PQFP, QCC, QFN, QVSOP, Radial, SIP, SKPQ, SKSJ, SMCG, SMC, SOD, SOIC, SOJ, SOT, SQFN, SSOP, TBGA, TFSON, TQFN, Transistor, TSOJ, TSOP1, TSOP2, TSSOP, USON, Zip,


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